1. Field of the Invention
The present invention relates to an advanced control in a data processing system and, more particularly, to an advanced control for a branch instruction in a data processing system of the type which executes a series of instructions in a pipelined system.
2. Description of the prior art
One of the problems regarding the handling of the branch instruction in an advanced control apparatus, particularly, the advanced control for the branch instruction in the data processing system of a pipeline system relates to how to specify the address of the target instruction (i.e. the branch address). To preliminarily fetch the target instruction in the advanced control, the branch address is calculated earlier using the contents of several registers which are designated by the branch instruction and the instruction fetching operation from this address is started. However, there can occur the case where the instruction preceding the branch the branch instruction in the instruction string is executed after completion of the calculation of the branch address, so that the content of the register used for the precedent address calculation is changed. In such a case, the instruction fetching from the address previously calculated becomes meaningless; thus, the address calculation and instruction fetch must be again executed.
In the control apparatus disclosed in Japanese Patent Unexamined Publication No. 39437/75 which is owned by the present assignee, there are provided, for each general purpose register, a register (GPR information register) for displaying the presence of the instruction which changes the content of that general purpose register and a circuit for resetting the above-mentioned display in response to the end of the execution of this instruction. The branch address is calculated only when the display regarding the register necessary for this calculation is reset. An amount of hardware of the register and the circuits relative to this register is considerably large. This apparatus also requires an arithmetic operating unit only for calculating the branch address. The amount of hardware increases also from this proposed solution.
Although various other kinds of apparatuses for handling the branch instruction in the advanced control apparatus have also been proposed, it is difficult to realize most of these apparatuses because of an excessive amount of necessary hardware.